MohammadReza Taheri; Nasim Shafiee; Mohammad Esmaeildoust; Zhale Amirjamshidi; Reza Sabbaghi-nadooshan; Keivan Navi
Volume 2, Issue 1 , January 2015, , Pages 43-54
The moduli set 2 n−1 − 1, 2 n+1 − 1, 2 n , 2 n − 1 has been recently proposed inliterature for class of 4n-bit dynamic range in residue number system. Due toonly ...
The moduli set 2 n−1 − 1, 2 n+1 − 1, 2 n , 2 n − 1 has been recently proposed inliterature for class of 4n-bit dynamic range in residue number system. Due toonly utilizing modulus in the form of 2 k − 1 besides modulo 2 n , this moduliset enjoys the efficient Arithmetic Unit (AU) in its architecture. Not only doesthe efficiency of a RNS system depend on the residue arithmetic unit but italso is limited to the residue to binary converter. In this paper, a new two levelresidue-to-binary converter architecture based on Mixed Radix Conversion(MRC) is presented for the aforementioned moduli set. The proposed converterincludes two levels of design based on MRC properties. Firstly, the 3-modulisubset 2 n−1 − 1, 2 n+1 − 1, 2 n − 1 is properly organized and as it does notcalculate several values, it results in some cost modifications. Eventually, atwo-moduli set 2 n−1 − 1 2 n+1 − 1 (2 n − 1) , 2 n is formed to compute thebinary of RNS counterpart. The proposed architecture is shown to be moreefficient both in terms of hardware cost and conversion delay in comparisonwith the related state-of-the-art works.